1. Field of the Invention
The present invention relates to an image signal processing apparatus having a plurality of image processing functions, and more particularly, to an image signal processing apparatus capable of successively executing a plurality of arbitrarily combined image processing functions through a single command.
2. Description of the Related Art
There is an image signal processing apparatus having a plurality of image processing function blocks, which achieves requested image processing by causing an external CPU to send a command specifying an operating mode to an internal CPU and the internal CPU to operate the respective image processing function blocks in the order specified by the command (see Unexamined Japanese Patent Publication No. 8-123944).
An image signal processing apparatus having a plurality of image processing function blocks and an individual processing parameter table which determines contents of individual operation for each image processing function block is known. Such an image signal processing apparatus generates a command issuance interrupt by causing a host CPU to write a command code to a command register.
Upon receipt of the command issuance interrupt, a micro program in a local control CPU analyzes the command code in the command register. Based on the analysis result, the local control CPU sets registers of the corresponding image processing function block based on the data of the corresponding image processing parameter table and writes the data in an input buffer memory from a host image bus through an external data input. Then, when data corresponding to a predetermined number of lines is stored in the input buffer memory, the micro program in the local control CPU starts an image processing program associated with the corresponding image processing function block. The image processing function block outputs the image processing result to an output buffer memory. When data corresponding to a predetermined number of lines is stored in the output buffer memory, the micro program outputs the data to the host image bus through a data external output.
To ensure that images are processed by the p program of the internal CPU in the image processing order specified by the command, the above described apparatus needs to describe all functions related to the settings of parameter registers in an external input/output block and image processing function block and the settings of a DMA controller which controls a data transfer between an SDRAM and the image processing function block, etc., in accordance with the advance of the image process. For that reason, when a single image processing function block is operated by a single command or even when a plurality of combined image processing function blocks is executed in a predetermined order, programming is easy if the processing order is fixed.
However, when an attempt is made to sequentially process an arbitrary combination of image processing function blocks and in an arbitrary processing order through a single command, programming is branched in a complicated manner. As the number of image processing function blocks increases, programming all their states involves an enormous amount of work and the amount of data of the μ program also becomes enormous.
When an attempt is made to sequentially process an arbitrary combination of image processing function blocks and in an arbitrary processing order, it may be possible to cause the host CPU to perform control by issuing commands in the image processing order sequentially, however when image processes in varying output image sizes such as rotation process and resolution variation are combined, parameters of the next-stage image processing function block change and a corresponding change to the image processing parameter table is required. As a result, the load on the host CPU increases.
A system which defines a command of a specific image processing order and provides a dedicated parameter table and micro program may be constructed, but as the number of image processing function blocks increases the combination becomes enormous and it is more difficult to provide the corresponding parameter table and micro program.